Silicon technology has formed the basis of microelectronics and electronics systems for more than 40 years. In terms of productivity, the density of devices on a silicon chip has followed Moore’s law, doubling about every two or three years since about 1980. Many researchers are interested in scaling down electronics devices so that they may perform at higher speeds and be prepared at lower costs. Conventional SiO₂ gate dielectrics are reaching their physical thickness limit (1.5 nm); they cannot be used as complementary metal oxide semiconductor devices because of the high direct-tunneling current and poor reliability. For further scaling of devices, it has been proposed that SiO₂ be replaced by high dielectric ceramic materials, such as ZrO₂, HfO₂, Ta₂O₅, Al₂O₃, TiO₂, and silicates (ZrSi_xO_y and HfSi_xO_y). In fact, ceramic films having higher permittivity allow the use of thicker films of equivalent electrical thickness as silicon dioxide; this situation reduces the leakage current and improve the reliability of the dielectric films.
Recently, numerous technologies have been developed for the preparation of various high-k films. Atomic layer deposition (ALD), physical vapor deposition (PVD), and chemical vapor deposition (CVD) methods have all been used to prepare insulating films for new technologies. In the ALD process, ZrCl₄ and H₂O are used to prepare the ZrO₂ films. For the PVD process, a zirconium metal target is used for sputtering under ambient oxygen to deposit the ZrO₂ films. In the CVD method, ZrCl₄ is used as a precursor of the deposited ZrO₂ films.
In this research, we applied different thermal treatments to sol-gel ZrO₂ or HfO₂ ultrathin films on silicon and used various characterization techniques to evaluate the material properties and electrical performances of these deposited films.